A VLSI implementation of the blowfish encryption/decryption algorithm

We propose an efficient hardware architecture for the Blowfish algorithm [1]. The speed is up to 4 bit/clock, which is 9 times faster than a Pentium. By applying operator-rescheduling method, the critical path delay is

• Type: Conference
• Year: 2000
• Where: ASPDAC
• Authors: Michael C.-J. Lin, Youn-Long Lin
• Keywords: ASPDAC 2000, Blowfish Algorithm, Critical Path Delay, Efficient Hardware Architecture, Hardware