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HPCA
2005
IEEE

Voltage and Frequency Control With Adaptive Reaction Time in Multiple-Clock-Domain Processors

14 years 11 months ago
Voltage and Frequency Control With Adaptive Reaction Time in Multiple-Clock-Domain Processors
Dynamic voltage and frequency scaling (DVFS) is a widely-used method for energy-efficient computing. In this paper, we present a new intra-task online DVFS scheme for multiple clock domain (MCD) processors. Most existing online DVFS schemes for MCD processors use a fixed time interval between possible voltage /frequency changes. The downside to this approach is that the interval boundaries are predetermined and independent of workload changes. Thus, they can be late in responding to large, severe activity swings. In this work, we propose an alternative online DVFS scheme in which the reaction time is self-tuned and adaptive to application and workload changes. In addition to designing such a scheme, we model the proposed DVFS control and use the derived model in a formal stability analysis. The obtained analytical insight is then used to guide and improve the design in terms of stability margin and control effectiveness. We evaluate our DVFS scheme through cycle-accurate simulation ov...
Qiang Wu, Philo Juang, Margaret Martonosi, Douglas
Added 01 Dec 2009
Updated 01 Dec 2009
Type Conference
Year 2005
Where HPCA
Authors Qiang Wu, Philo Juang, Margaret Martonosi, Douglas W. Clark
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