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DATE
2007
IEEE

Worst-case design and margin for embedded SRAM

14 years 5 months ago
Worst-case design and margin for embedded SRAM
An important aspect of Design for Yield for embedded SRAM is identifying the expected worst case behavior in order to guarantee that sufficient design margin is present. Previously, this has involved multiple simulation corners and extreme test conditions. It is shown that statistical concerns and device variability now require a different approach, based on work in Extreme Value Theory. This method is used to develop a lower-bound for variability-related yield in memories. 1 Background and motivation Device variability is becoming important in embedded memory design, and a fundamental question is how much margin is enough to ensure high quality and robust operation without over-constraining performance. For example, it is very unlikely that the “worst” bit cell is associated with the “worst” sense amplifier, making an absolute “worst-case” margin method overly conservative, but this assertion needs to be formalized and tested. Setting the margin places a lower bound on yi...
Robert C. Aitken, Sachin Idgunji
Added 02 Jun 2010
Updated 02 Jun 2010
Type Conference
Year 2007
Where DATE
Authors Robert C. Aitken, Sachin Idgunji
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