WMPI
14 years 3 months ago
2004 ACM 
Abstract. The large and growing impact of memory hierarchies on overall system performance compels designers to investigate innovative techniques to improve memory-system efficienc...
WMPI
14 years 3 months ago
2004 ACM 
The cache hierarchy design in existing SMT and superscalar processors is optimized for latency, but not for bandwidth. The size of the L1 data cache did not scale over the past dec...
WMPI
14 years 3 months ago
2004 ACM
Abstract. Many applications with large data spaces that cannot run on a typical workstation (due to page faults) call for techniques to expand the effective memory size. One such t...
WMPI
14 years 3 months ago
2004 ACM
Current trends suggest that the number of memory chips per processor chip will increase at least a factor of ten in seven years. This will make DRAM cost, the space and the power i...
WMPI
14 years 3 months ago
2004 ACM
The Opie Project aims to develop a compiler to transform C codes written for row-major matrix representation into equivalent codes for Morton-order matrix representation, and to a...
|
Computer Architecture