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FPGA
2008
ACM
151views FPGA» more  FPGA 2008»
13 years 9 months ago
Beyond the arithmetic constraint: depth-optimal mapping of logic chains in LUT-based FPGAs
Look-up table based FPGAs have migrated from a niche technology for design prototyping to a valuable end-product component and, in some cases, a replacement for general purpose pr...
Michael T. Frederick, Arun K. Somani
ERSA
2008
93views Hardware» more  ERSA 2008»
13 years 9 months ago
Multiparadigm Computing for Space-Based Synthetic Aperture Radar
Projected computational requirements for future space missions are outpacing technologies and trends in conventional embedded microprocessors. In order to meet the necessary levels...
Adam Jacobs, Grzegorz Cieslewski, Casey Reardon, A...
ICAI
2004
13 years 9 months ago
A User Centered Evolutionary Scheduling Framework
The need for supporting CSCW applications with heterogeneous and varying user requirements call for adaptive and reconfigurable schedulers accommodating a mixture of real-time, pro...
Horst Wedde, Muddassar Farooq, Mario Lischka
IJCAI
1997
13 years 9 months ago
Evolvable Hardware for Generalized Neural Networks
This paper describes an evolvable hardware (EHW) system for generalized neural network learning. We have developed an ASIC VLSI chip, which is a building block to configure a scal...
Masahiro Murakawa, Shuji Yoshizawa, Isamu Kajitani...
PPL
2008
144views more  PPL 2008»
13 years 7 months ago
Rapid Prototyping of the Data-Driven Chip-Multiprocessor (d2-CMP) Using FPGAs
This paper presents the FPGA implementation of the prototype for the Data-Driven Chip-Multiprocessor (D2-CMP). In particular, we study the implementation of a Thread Synchronizati...
Konstantinos Tatas, Costas Kyriacou, Paraskevas Ev...