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» A Benchmark Diagnostic Model Generation System
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WSC
1997
13 years 8 months ago
Efficient Instruction Cache Simulation and Execution Profiling with a Threaded-Code Interpreter
We present an extension to an existing SPARC V8 instruction set simulator, SimICS, to support accurate profiling of branches and instruction cache misses. SimICS had previously su...
Peter S. Magnusson
SC
2004
ACM
14 years 24 days ago
Rating Compiler Optimizations for Automatic Performance Tuning
To achieve maximum performance gains through compiler optimization, most automatic performance tuning systems use a feed-back directed approach to rate the code versions generated...
Zhelong Pan, Rudolf Eigenmann
CGO
2010
IEEE
14 years 15 days ago
Taming hardware event samples for FDO compilation
Feedback-directed optimization (FDO) is effective in improving application runtime performance, but has not been widely adopted due to the tedious dual-compilation model, the difï...
Dehao Chen, Neil Vachharajani, Robert Hundt, Shih-...
HIPEAC
2005
Springer
14 years 27 days ago
Garbage Collection Hints
This paper shows that Appel-style garbage collectors often make suboptimal decisions both in terms of when and how to collect. We argue that garbage collection should be done when ...
Dries Buytaert, Kris Venstermans, Lieven Eeckhout,...
ASPDAC
2004
ACM
120views Hardware» more  ASPDAC 2004»
14 years 25 days ago
Compiler based exploration of DSP energy savings by SIMD operations
— The growing use of digital signal processors (DSPs) in embedded systems necessitates the use of optimizing compilers supporting their special architecture features. Beside the ...
Markus Lorenz, Peter Marwedel, Thorsten Dräge...