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LCTRTS
2007
Springer
14 years 1 months ago
Tetris: a new register pressure control technique for VLIW processors
The run-time performance of VLIW (very long instruction word) microprocessors depends heavily on the effectiveness of its associated optimizing compiler. Typical VLIW compiler pha...
Weifeng Xu, Russell Tessier
OOPSLA
2007
Springer
14 years 1 months ago
Ilea: inter-language analysis across java and c
Java bug finders perform static analysis to find implementation mistakes that can lead to exploits and failures; Java compilers perform static analysis for optimization. If Java...
Gang Tan, Greg Morrisett
CC
2001
Springer
131views System Software» more  CC 2001»
13 years 12 months ago
Compiler Transformation of Pointers to Explicit Array Accesses in DSP Applications
Abstract. Efficient implementation of DSP applications are critical for embedded systems. However, current applications written in C, make extensive use of pointer arithmetic maki...
Björn Franke, Michael F. P. O'Boyle
ARC
2007
Springer
150views Hardware» more  ARC 2007»
13 years 11 months ago
MT-ADRES: Multithreading on Coarse-Grained Reconfigurable Architecture
The coarse-grained reconfigurable architecture ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) and its compiler offer high instruction-level parallelism (ILP)...
Kehuai Wu, Andreas Kanstein, Jan Madsen, Mladen Be...
DATE
2006
IEEE
113views Hardware» more  DATE 2006»
14 years 1 months ago
An interprocedural code optimization technique for network processors using hardware multi-threading support
Sophisticated C compiler support for network processors (NPUs) is required to improve their usability and consequently, their acceptance in system design. Nonetheless, high-level ...
Hanno Scharwächter, Manuel Hohenauer, Rainer ...