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FPGA
2009
ACM
343views FPGA» more  FPGA 2009»
15 years 11 months ago
Fpga-based face detection system using Haar classifiers
This paper presents a hardware architecture for face detection based system on AdaBoost algorithm using Haar features. We describe the hardware design techniques including image s...
Junguk Cho, Shahnam Mirzaei, Jason Oberg, Ryan Kas...
ICSE
2003
IEEE-ACM
15 years 9 months ago
A Tutorial on Feature Oriented Programming and Product-Lines
ct Feature Oriented Programming (FOP) is a design methodology and tools for program synthesis. The goal is to specify a target program in terms of the features that it offers, and ...
Don S. Batory
CODES
2006
IEEE
15 years 10 months ago
A multiprocessing approach to accelerate retargetable and portable dynamic-compiled instruction-set simulation
Traditionally, instruction-set simulators (ISS’s) are sequential programs running on individual processors. Besides the advances of simulation techniques, ISS’s have been main...
Wei Qin, Joseph D'Errico, Xinping Zhu
LCTRTS
2009
Springer
15 years 11 months ago
Addressing the challenges of DBT for the ARM architecture
Dynamic binary translation (DBT) can provide security, virtualization, resource management and other desirable services to embedded systems. Although DBT has many benefits, its r...
Ryan W. Moore, José Baiocchi, Bruce R. Chil...
LCTRTS
2007
Springer
15 years 10 months ago
Addressing instruction fetch bottlenecks by using an instruction register file
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
Stephen Roderick Hines, Gary S. Tyson, David B. Wh...