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» A C to Hardware Software Compiler
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CODES
2006
IEEE
15 years 10 months ago
TLM/network design space exploration for networked embedded systems
This paper presents a methodology to combine Transaction Level Modeling and System/Network co-simulation for the design of networked embedded systems. As a result, a new design di...
Nicola Bombieri, Franco Fummi, Davide Quaglia
CODES
2006
IEEE
15 years 10 months ago
A bus architecture for crosstalk elimination in high performance processor design
In deep sub-micron technology, the crosstalk effect between adjacent wires has become an important issue, especially between long on-chip buses. This effect leads to the increas...
Wen-Wen Hsieh, Po-Yuan Chen, TingTing Hwang
CODES
2006
IEEE
15 years 10 months ago
Bounded arbitration algorithm for QoS-supported on-chip communication
Time-critical multi-processor systems require guaranteed services in terms of throughput, bandwidth etc. in order to comply to hard real-time constraints. However, guaranteedservi...
Mohammad Abdullah Al Faruque, Gereon Weiss, Jö...
CODES
2005
IEEE
15 years 10 months ago
Satisfying real-time constraints with custom instructions
Instruction-set extensible processors allow an existing processor core to be extended with application-specific custom instructions. In this paper, we explore a novel application...
Pan Yu, Tulika Mitra
IPPS
2005
IEEE
15 years 10 months ago
Accelerating Scientific Applications with the SRC-6 Reconfigurable Computer: Methodologies and Analysis
Reconfigurable computing offers the promise of performing computations in hardware to increase performance and efficiency while retaining much of the flexibility of a software sol...
Melissa C. Smith, Jeffrey S. Vetter, Xuejun Liang