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» A C to Hardware Software Compiler
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ETS
2007
IEEE
105views Hardware» more  ETS 2007»
14 years 4 months ago
Communication-Centric SoC Debug Using Transactions
— The growth in System-on-Chip complexity puts pressure on system verification. Due to limitations in the pre-silicon verification process, errors in hardware and software slip...
Bart Vermeulen, Kees Goossens, Remco van Steeden, ...
CODES
2009
IEEE
14 years 4 months ago
A high-level virtual platform for early MPSoC software development
Multiprocessor System-on-Chips (MPSoCs) are nowadays widely used, but the problem of their software development persists to be one of the biggest challenges for developers. Virtua...
Jianjiang Ceng, Weihua Sheng, Jerónimo Cast...
SIGPLAN
1998
13 years 9 months ago
Optimizing Away C++ Exception Handling
A high performance implementation of C++ exception handling is crucial, because exception handling overhead is distributed across all code. The commonly-used table-driven approach...
Jonathan L. Schilling
TACO
2008
130views more  TACO 2008»
13 years 9 months ago
Efficient hardware code generation for FPGAs
r acceptance of FPGAs as a computing device requires a higher level of programming abstraction. ROCCC is an optimizing C to HDL compiler. We describe the code generation approach i...
Zhi Guo, Walid A. Najjar, Betul Buyukkurt