1404 search results - page 50 / 281 » A C to Hardware Software Compiler |
136
click to vote
LCPC
1995
Springer
15 years 7 months ago
1995
Springer
Heterogeneous parallel systems incorporate diverse models of parallelism within a single machine or across machines and are better suited for diverse applications 25, 43, 30]. Thes...
125
click to vote
ISSS
1998
IEEE
15 years 8 months ago
1998
IEEE
The concept of retargetability enables compiler technology to keep pace with the increasing variety of domain-speci c embedded processors. In order to achieve user retargetability,...
129
Voted
CASES
2009
ACM
15 years 10 months ago
2009
ACM
Accurate estimation of the tick length of a synchronous program is essential for efficient and predictable implementations that are devoid of timing faults. The techniques to dete...
118
Voted
ISQED
2002
IEEE
15 years 8 months ago
2002
IEEE
This paper presents a hybrid BIST architecture and methods for optimizing it to test systems-on-chip in a cost effective way. The proposed self-test architecture can be implemente...
132
Voted
DAC
2009
ACM
16 years 5 months ago
2009
ACM
Traditionally, synchronous languages, such as Esterel, have been compiled into hardware, where timing analysis is relatively easy. When compiled into software ? e.g., into sequent...