1404 search results - page 71 / 281 » A C to Hardware Software Compiler |
166
Voted
CODES
2009
IEEE
15 years 10 months ago
2009
IEEE
In this paper, we investigate the use of instruction set simulators (ISS) based on binary translation to accelerate full timed multiprocessor system simulation at transaction leve...
131
Voted
PLDI
2000
ACM
15 years 8 months ago
2000
ACM
We describe the design and implementation of Dynamo, a software dynamic optimization system that is capable of transparently improving the performance of a native instruction stre...
126
click to vote
CAINE
2006
15 years 5 months ago
2006
The synergy of software and hardware leads to efficient application expression profile (AEP) not only in terms of execution time and energy but also optimal architecture usage. We...
146
Voted
MICRO
1997
IEEE
15 years 7 months ago
1997
IEEE
Compiler optimizations are often driven by specific assumptions about the underlying architecture and implementation of the target machine. For example, when targeting shared-mem...
128
Voted
CODES
2005
IEEE
15 years 9 months ago
2005
IEEE
The performance of virtual machines (e.g., Java Virtual Machines—JVMs) can be significantly improved when critical code sections (e.g., Java bytecode methods) are migrated from...