1404 search results - page 87 / 281 » A C to Hardware Software Compiler |
ASPLOS
2008
ACM
14 years 1 days ago
2008
ACM
Many code analysis techniques for optimization, debugging, or parallelization need to perform runtime disambiguation of sets of addresses. Such operations can be supported efficie...
CODES
2008
IEEE
14 years 4 months ago
2008
IEEE
The heterogeneity of modern MPSoC architectures, coupled with the increasing complexity of the applications mapped onto them has recently led to a lot of interest in hybrid perfor...
CODES
2006
IEEE
14 years 4 months ago
2006
IEEE
Multi-million gate System-on-Chip (SoC) designs increasingly rely on Intellectual Property (IP) blocks. However, due to technology scaling the leakage power consumption of the IP ...
CODES
2006
IEEE
14 years 4 months ago
2006
IEEE
The memory subsystem of a complex multiprocessor systemson-chip (MPSoC) is an important contributor to the chip power consumption. The selection of memory architecture, as well as...
SPAA
2009
ACM
14 years 10 months ago
2009
ACM
Transactional memory (TM) eliminates many problems associated with lock-based synchronization. Over recent years, much progress has been made in software and hardware implementati...