65 search results - page 11 / 13 » A Cache Consistency Protocol for Multiprocessors with Multis... |
SAS
2007
Springer
14 years 1 months ago
2007
Springer
We present a new pointer analysis for use in shared memory programs running on hierarchical parallel machines. The analysis is motivated by the partitioned global address space lan...
SOSP
1997
ACM
13 years 8 months ago
1997
ACM
Low-latency remote-write networks, such as DEC’s Memory Channel, provide the possibility of transparent, inexpensive, large-scale shared-memory parallel computing on clusters of...
ISCA
1994
IEEE
13 years 11 months ago
1994
IEEE
We comparethe performance of software-supported shared memory on a general-purpose network to hardware-supported shared memory on a dedicated interconnect. Up to eight processors,...
HPCA
2009
IEEE
14 years 8 months ago
2009
IEEE
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
WSC
1997
13 years 8 months ago
1997
We describe our experiences designing and implementing a virtual PNNI network testbed. The network elements and signaling protocols modeled are consistent with the ATM Forum PNNI ...