As on-chip integration matures, single-chip system designers must not only be concerned with component-level issues such as performance and power, but also with onchip system-leve...
We describe MGV, an integrated visualization and exploration system for massive multi-digraph navigation. MGV’s only assumption is that the vertex set of the underlying digraph ...
A novel design-for-test (DFT) technique is presented for designing a core with a “virtual scan chain” which looks (to the system integrator) like it is shorter than the real s...
In this paper we derive formal constraints relating terrain elevation and observed cast shadows. We show how an optimisation framework can be used to refine surface estimates usin...
The complexity of deploying high-performance spatial structures in transactional DBMS environments has motivated researchers to experiment with the idea of reusing the effort inve...