334 search results - page 13 / 67 » A Case for Deconstructing Hardware Transactional Memory Syst... |
RTSS
2007
IEEE
14 years 3 months ago
2007
IEEE
The integration phase of real-time COTS-based systems is often problematic because when multiple tasks run concurrently, the interference at the bus level between cache fetching a...
ARC
2010
Springer
14 years 17 hour ago
2010
Springer
As reconfigurable computing hardware and in particular FPGA-based systems-on-chip comprise an increasing number of processor and accelerator cores, supporting sharing and synchroni...
PPOPP
2009
ACM
14 years 9 months ago
2009
ACM
Transactional Memory (TM) is being studied widely as a new technique for synchronizing concurrent accesses to shared memory data structures for use in multi-core systems. Much of ...
IEEEPACT
2006
IEEE
14 years 2 months ago
2006
IEEE
Transactional memory is an attractive design concept for scalable multiprocessors because it offers efficient lock-free synchronization and greatly simplifies parallel software....
IPPS
2010
IEEE
13 years 6 months ago
2010
IEEE
We present a novel architecture of a communication engine for non-coherent distributed shared memory systems. The shared memory is composed by a set of nodes exporting their memory...