334 search results - page 25 / 67 » A Case for Deconstructing Hardware Transactional Memory Syst... |
ISCA
2012
IEEE
11 years 11 months ago
2012
IEEE
Modern memory controllers employ sophisticated address mapping, command scheduling, and power management optimizations to alleviate the adverse effects of DRAM timing and resource...
ECBS
2004
IEEE
14 years 12 days ago
2004
IEEE
The focus of typical architectural models is the description of large systems. Even though these systems are usually distributed, aspects of distributed systems are only addressed...
IEEEPACT
2007
IEEE
14 years 3 months ago
2007
IEEE
Transactional Memory (TM) simplifies parallel programming by supporting atomic and isolated execution of user-identified tasks. To date, TM programming has required the use of l...
MICRO
2010
IEEE
13 years 6 months ago
2010
IEEE
Abstract--Parallel programming is hard, because it is impractical to test all possible thread interleavings. One promising approach to improve a multi-threaded program's relia...
DATE
2006
IEEE
14 years 2 months ago
2006
IEEE
The increasing complexity of embedded systems pushes system designers to higher levels of abstraction. Transaction Level Modeling (TLM) has been proposed to model ation in systems...