Sciweavers

334 search results - page 6 / 67
» A Case for Deconstructing Hardware Transactional Memory Syst...
Sort
View
ISCA
2007
IEEE
143views Hardware» more  ISCA 2007»
14 years 3 months ago
Performance pathologies in hardware transactional memory
Hardware Transactional Memory (HTM) systems reflect choices from three key design dimensions: conflict detection, version management, and conflict resolution. Previously propos...
Jayaram Bobba, Kevin E. Moore, Haris Volos, Luke Y...
IEEEPACT
2008
IEEE
14 years 3 months ago
Scalable and reliable communication for hardware transactional memory
In a hardware transactional memory system with lazy versioning and lazy conflict detection, the process of transaction commit can emerge as a bottleneck. This is especially true ...
Seth H. Pugsley, Manu Awasthi, Niti Madan, Naveen ...
HPCC
2009
Springer
14 years 14 days ago
Dynamically Filtering Thread-Local Variables in Lazy-Lazy Hardware Transactional Memory
Abstract--Transactional Memory (TM) is an emerging technology which promises to make parallel programming easier. However, to be efficient, underlying TM system should protect only...
Sutirtha Sanyal, Sourav Roy, Adrián Cristal...
ICS
2009
Tsinghua U.
13 years 6 months ago
Refereeing conflicts in hardware transactional memory
In the search for high performance, most transactional memory (TM) systems execute atomic blocks concurrently and must thus be prepared for data conflicts. The TM system must then...
Arrvindh Shriraman, Sandhya Dwarkadas
HIPEAC
2010
Springer
13 years 10 months ago
Improving Performance by Reducing Aborts in Hardware Transactional Memory
The optimistic nature of Transactional Memory (TM) systems can lead to the concurrent execution of transactions that are later found to conflict. Conflicts degrade scalability, a...
Mohammad Ansari, Behram Khan, Mikel Luján, ...