Sciweavers

1040 search results - page 49 / 208
» A Comparative Performance Evaluation of Write Barrier Implem...
Sort
View
HPCA
2009
IEEE
14 years 9 months ago
Design and implementation of software-managed caches for multicores with local memory
Heterogeneous multicores, such as Cell BE processors and GPGPUs, typically do not have caches for their accelerator cores because coherence traffic, cache misses, and latencies fr...
Sangmin Seo, Jaejin Lee, Zehra Sura
IADIS
2008
13 years 10 months ago
Autonomous Presentation Capture In Corporate And Educational Settings
While researchers have been exploring automatic presentation capture since the 1990's, real world adoption has been limited. Our research focuses on simplifying presentation ...
David M. Hilbert, Thea Turner, Laurent Denoue, Kan...
CLOUDCOM
2010
Springer
13 years 7 months ago
Evaluation of MapReduce for Gridding LIDAR Data
-- The MapReduce programming model, introduced by Google, has become popular over the past few years as a mechanism for processing large amounts of data, using sharednothing parall...
Sriram Krishnan, Chaitanya K. Baru, Christopher J....
IOLTS
2002
IEEE
127views Hardware» more  IOLTS 2002»
14 years 2 months ago
Fault Tolerance Evaluation Using Two Software Based Fault Injection Methods
A silicon independent C-Based model of the TTP/C protocol was implemented within the EU-founded project FIT. The C-based model is integrated in the C-Sim simulation environment. T...
Astrit Ademaj, Petr Grillinger, Pavel Herout, Jan ...
PPDP
2010
Springer
13 years 7 months ago
Towards a jitting VM for prolog execution
Most Prolog implementations are implemented in low-level languages such as C and are based on a variation of the WAM instruction set, which enhances their performance but makes th...
Carl Friedrich Bolz, Michael Leuschel, David Schne...