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PPOPP
2009
ACM
14 years 8 months ago
Mapping parallelism to multi-cores: a machine learning based approach
The efficient mapping of program parallelism to multi-core processors is highly dependent on the underlying architecture. This paper proposes a portable and automatic compiler-bas...
Zheng Wang, Michael F. P. O'Boyle
IPPS
2005
IEEE
14 years 1 months ago
A Compiler-Enabled Model- and Measurement-Driven Adaptation Environment for Dependability and Performance
Traditional techniques for building dependable, highperformance distributed systems are too expensive for most non-critical systems, often causing dependability to be sidelined as...
Vikram S. Adve, Adnan Agbaria, Matti A. Hiltunen, ...
ICCD
2003
IEEE
115views Hardware» more  ICCD 2003»
14 years 4 months ago
Reducing Compilation Time Overhead in Compiled Simulators
Compiled simulation is a well known technique for improving the performance of instruction set simulators at the cost of compilation time. However the compilation time overhead ma...
Mehrdad Reshadi, Nikil D. Dutt
CF
2004
ACM
14 years 29 days ago
Combining compiler and runtime IPC predictions to reduce energy in next generation architectures
Next generation architectures will require innovative solutions to reduce energy consumption. One of the trends we expect is more extensive utilization of compiler information dir...
Saurabh Chheda, Osman S. Unsal, Israel Koren, C. M...
SBACPAD
2006
IEEE
102views Hardware» more  SBACPAD 2006»
14 years 1 months ago
Ultra-Fast CPU Performance Prediction: Extending the Monte Carlo Approach
Performance evaluation of contemporary processors is becoming increasingly difficult due to the lack of proper frameworks. Traditionally, cycle-accurate simulators have been exte...
Ram Srinivasan, Jeanine Cook, Olaf M. Lubeck