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FCCM
2000
IEEE
144views VLSI» more  FCCM 2000»
14 years 10 days ago
Automatic Synthesis of Data Storage and Control Structures for FPGA-Based Computing Engines
Mapping computations written in high-level programming languages to FPGA-based computing engines requires programmers to generate the datapath responsible for the core of the comp...
Pedro C. Diniz, Joonseok Park
ECML
1991
Springer
13 years 11 months ago
Learning by Analogical Replay in PRODIGY: First Results
Robust reasoning requires learning from problem solving episodes. Past experience must be compiled to provide adaptation to new contingencies and intelligent modification of solut...
Manuela M. Veloso, Jaime G. Carbonell
ICS
1994
Tsinghua U.
14 years 1 days ago
Compiler and runtime support for out-of-core HPF programs
This paper describes the design of a compiler which can translate out-of-core programs written in a data parallel language like HPF. Such a compiler is required for compiling larg...
Rajeev Thakur, Rajesh Bordawekar, Alok N. Choudhar...
IPPS
2006
IEEE
14 years 1 months ago
Exploring the design space of an optimized compiler approach for mesh-like coarse-grained reconfigurable architectures
In this paper we study the performance improvements and trade-offs derived from an optimized mapping approach applied on a parametric coarse grained reconfigurable array architect...
Grigoris Dimitroulakos, Michalis D. Galanis, Const...
WICON
2010
13 years 5 months ago
Resource Allocation and Reuse for Inter-cell Interference Mitigation in OFDMA based Communication Networks
Inter-cell interference (ICI) mitigation is always a big challenge issue in cellular systems. In this work we propose an Enhanced Fractional Frequency Reuse (EFFR) scheme with an i...
Zheng Xie, Bernhard Walke