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ISQED
2005
IEEE
125views Hardware» more  ISQED 2005»
14 years 1 months ago
A New Method for Design of Robust Digital Circuits
As technology continues to scale beyond 100nm, there is a significant increase in performance uncertainty of CMOS logic due to process and environmental variations. Traditional c...
Dinesh Patil, Sunghee Yun, Seung-Jean Kim, Alvin C...
ICLP
2010
Springer
13 years 11 months ago
HEX Programs with Action Atoms
hex programs were originally introduced as a general framework for extending declarative logic programming, under the stable model semantics, with the possibility of bidirectional...
Selen Basol, Ozan Erdem, Michael Fink, Giovambatti...
ICSE
2009
IEEE-ACM
13 years 5 months ago
Architecting Robustness and Timeliness in a New Generation of Aerospace Systems
Aerospace systems have strict dependability and real-time requirements, as well as a need for flexible resource reallocation and reduced size, weight and power consumption. To cope...
José Rufino, João Craveiro, Paulo Ve...
ICCD
2004
IEEE
128views Hardware» more  ICCD 2004»
14 years 4 months ago
Static Transition Probability Analysis Under Uncertainty
Deterministic gate delay models have been widely used to find the transition probabilities at the nodes of a circuit for calculating the power dissipation. However, with progress...
Siddharth Garg, Siddharth Tata, Ravishankar Arunac...
FSTTCS
2009
Springer
14 years 2 months ago
Modelchecking counting properties of 1-safe nets with buffers in paraPSPACE
ABSTRACT. We consider concurrent systems that can be modelled as 1-safe Petri nets communicating through a fixed set of buffers (modelled as unbounded places). We identify a param...
M. Praveen, Kamal Lodaya