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HPCA
1999
IEEE
14 years 22 days ago
The Synergy of Multithreading and Access/Execute Decoupling
This work presents and evaluates a novel processor microarchitecture which combines two paradigms: access/ execute decoupling and simultaneous multithreading. We investigate how b...
Joan-Manuel Parcerisa, Antonio González
TVLSI
2008
120views more  TVLSI 2008»
13 years 8 months ago
An Interactive Design Environment for C-Based High-Level Synthesis of RTL Processors
Much effort in register transfer level (RTL) design has been devoted to developing "push-button" types of tools. However, given the highly complex nature, and lack of con...
Dongwan Shin, Andreas Gerstlauer, Rainer Döme...
MICRO
2010
IEEE
242views Hardware» more  MICRO 2010»
13 years 6 months ago
ASF: AMD64 Extension for Lock-Free Data Structures and Transactional Memory
Advanced Synchronization Facility (ASF) is an AMD64 hardware extension for lock-free data structures and transactional memory. It provides a speculative region that atomically exec...
Jae-Woong Chung, Luke Yen, Stephan Diestelhorst, M...
GI
2009
Springer
13 years 6 months ago
Towards Integration of Uncertain Sensor Data into Context-aware Workflows
: The integration and usage of uncertain sensor data in workflows is a difficult problem. In this paper we describe these difficulties which result from the combination of very dis...
Matthias Wieland, Uwe-Philipp Käppeler, Paul ...
TKDE
2010
149views more  TKDE 2010»
13 years 3 months ago
A Configurable Rete-OO Engine for Reasoning with Different Types of Imperfect Information
The RETE algorithm is a very efficient option for the development of a rule-based system, but it supports only boolean, first order logic. Many real-world contexts, instead, requir...
Davide Sottara, Paola Mello, Mark Proctor