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TPDS
2002
105views more  TPDS 2002»
13 years 8 months ago
HiPER: A Compact Narrow Channel Router with Hop-by-Hop Error Correction
Multiprocessor architectures demand efficient interprocessor communication to maximize system utilization and performance. To meet future demands, these interconnects must communic...
Phil May, Santithorn Bunchua, D. Scott Wills
CORR
2010
Springer
123views Education» more  CORR 2010»
13 years 8 months ago
A Peer-to-Peer Middleware Framework for Resilient Persistent Programming
The persistent programming systems of the 1980s offered a programming model that integrated computation and long-term storage. In these systems, reliable applications could be eng...
Alan Dearle, Graham N. C. Kirby, Stuart J. Norcros...
DAC
2008
ACM
14 years 9 months ago
Multiprocessor performance estimation using hybrid simulation
With the growing number of programmable processing elements in today's MultiProcessor System-on-Chip (MPSoC) designs, the synergy required for the development of the hardware...
Lei Gao, Kingshuk Karuri, Stefan Kraemer, Rainer L...
ICDIM
2007
IEEE
14 years 2 months ago
Accessibility and scalability in collaborative eCommerce environments
The Much advancement has lately occurred in eCommerce systems’ interfaces. Product specifications listings combined with pictures is no longer considered the benchmark for eComm...
Michel Khoury, Shervin Shirmohammadi
FPL
2005
Springer
110views Hardware» more  FPL 2005»
14 years 2 months ago
CUSTARD - A Customisable Threaded FPGA Soft Processor and Tools
Abstract. We propose CUSTARD — CUStomisable Threaded ARchitecture — a soft processor design space that combines support for multiple hardware threads and automatically generate...
Robert G. Dimond, Oskar Mencer, Wayne Luk