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PPOPP
2005
ACM
14 years 3 months ago
A linear-time algorithm for optimal barrier placement
We want to perform compile-time analysis of an SPMD program and place barriers in it to synchronize it correctly, minimizing the runtime cost of the synchronization. This is the b...
Alain Darte, Robert Schreiber
ICPP
1991
IEEE
14 years 1 months ago
Two Techniques to Enhance the Performance of Memory Consistency Models
The memory consistency model supported by a multiprocessor directly affects its performance. Thus, several attempts have been made to relax the consistency models to allow for mor...
Kourosh Gharachorloo, Anoop Gupta, John L. Henness...
DATE
2007
IEEE
114views Hardware» more  DATE 2007»
14 years 4 months ago
Mapping the physical layer of radio standards to multiprocessor architectures
We are concerned with the software implementation of baseband processing for the physical layer of radio standards (“Software Defined Radio - SDR”). Given the constraints for ...
Cyprian Grassmann, Mathias Richter, Mirko Sauerman...
ICVGIP
2008
13 years 11 months ago
Ray Casting Deformable Models on the GPU
The GPUs pack high computation power and a restricted architecture into easily available hardware today. They are now used as computation co-processors and come with programming m...
Suryakant Patidar, P. J. Narayanan
IPPS
2006
IEEE
14 years 4 months ago
A performance model for fine-grain accesses in UPC
UPC’s implicit communication and fine-grain programming style make application performance modeling a challenging task. The correspondence between remote references and communi...
Zhang Zhang, S. R. Seidel