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WIMOB
2008
IEEE
14 years 2 months ago
A Mechanism Design-Based Secure Architecture for Mobile Ad Hoc Networks
—To avoid the single point of failure for the certificate authority (CA) in MANET, a decentralized solution is proposed where nodes are grouped into different clusters. Each clu...
Abderrezak Rachedi, Abderrahim Benslimane, Hadi Ot...
TVLSI
2010
13 years 2 months ago
Enhancing the Area Efficiency of FPGAs With Hard Circuits Using Shadow Clusters
There is a dramatic logic density gap between FPGAs and ASICs, and this gap is the main reason FPGAs are not cost-effective in high volume applications. Modern FPGAs narrow this ga...
Peter A. Jamieson, Jonathan Rose
ICCS
2004
Springer
14 years 29 days ago
Hierarchical Matrix-Matrix Multiplication Based on Multiprocessor Tasks
We consider the realization of matrix-matrix multiplication and propose a hierarchical algorithm implemented in a task-parallel way using multiprocessor tasks on distributed memory...
Sascha Hunold, Thomas Rauber, Gudula Rünger
IPPS
1999
IEEE
13 years 12 months ago
Hardwired-Clusters Partial-Crossbar: A Hierarchical Routing Architecture for Multi-FPGA Systems
Multi-FPGA systems (MFSs) are used as custom computing machines, logic emulators and rapid prototyping vehicles. A key aspect of these systems is their programmable routing archit...
Mohammed A. S. Khalid, Jonathan Rose
FPL
2009
Springer
166views Hardware» more  FPL 2009»
14 years 6 days ago
Modeling post-techmapping and post-clustering FPGA circuit depth
This paper presents an analytical model that relates FPGA architectural parameters to the expected speed of FPGA implementation. More precisely, the model relates the lookuptable ...
Joydip Das, Steven J. E. Wilton, Philip Heng Wai L...