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ISVLSI
2005
IEEE
169views VLSI» more  ISVLSI 2005»
14 years 1 months ago
High Performance Array Processor for Video Decoding
high NRE cost. Therefore, general purpose programmable processors using software to perform various functions become more attractive since programmability can simplify system devel...
J. Lee, Narayanan Vijaykrishnan, Mary Jane Irwin
ERSA
2007
86views Hardware» more  ERSA 2007»
13 years 9 months ago
High-Precision BLAS on FPGA-enhanced Computers
The emergence of high-density reconfigurable hardware devices gives scientists and engineers an option to accelerating their numerical computing applications on low-cost but power...
Chuan He, Guan Qin, Richard E. Ewing, Wei Zhao
TPDS
2008
113views more  TPDS 2008»
13 years 7 months ago
Evaluating a High-Level Parallel Language (GpH) for Computational GRIDs
Computational Grids potentially offer low cost, readily available, and large-scale high-performance platforms. For the parallel execution of programs, however, computational GRIDs ...
Abdallah Al Zain, Philip W. Trinder, Greg Michaels...
FPL
1995
Springer
137views Hardware» more  FPL 1995»
13 years 11 months ago
High-Speed Region Detection and Labeling Using an FPGA Based Custom Computing Platform
General purpose custom computing platforms, such as Splash-2, have demonstrated the ability to enter mainstream computing not only due to their near application-specific speeds bu...
Ramana V. Rachakonda, Peter M. Athanas, A. Lynn Ab...
DATE
2009
IEEE
242views Hardware» more  DATE 2009»
14 years 2 months ago
A high performance reconfigurable Motion Estimation hardware architecture
Motion Estimation (ME) is the most computationally intensive part of video compression and video enhancement systems. For the recently available high definition frame sizes and hi...
Ozgur Tasdizen, Halil Kukner, Abdulkadir Akin, Ilk...