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» A Decompression Architecture for Low Power Embedded Systems
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SASP
2008
IEEE
164views Hardware» more  SASP 2008»
14 years 3 months ago
AMPLE: An Adaptive Multi-Performance Processor for Low-Energy Embedded Applications
This paper proposes an energy efficient processor which can be used as a design alternative for the dynamic voltage scaling (DVS) processors in embedded system design. The proces...
Tohru Ishihara, Seiichiro Yamaguchi, Yuriko Ishito...
HIPEAC
2005
Springer
14 years 2 months ago
Power Aware External Bus Arbitration for System-on-a-Chip Embedded Systems
Abstract. Power efficiency has become a key design trade-off in embedded system designs. For system-on-a-chip embedded systems, an external bus interconnects embedded processor co...
Ke Ning, David R. Kaeli
EUROMICRO
2000
IEEE
14 years 1 months ago
A Simulink(c)-Based Approach to System Level Design and Architecture Selection
We propose a design flow for low-power and low-cost, data-dominated, embedded systems which tightly integrate different technologies and architectures. We use Mathworks’ Simuli...
Luciano Lavagno, Begoña Pino, Leonardo Mari...
HOTOS
2009
IEEE
14 years 18 days ago
Mobility Changes Everything in Low-Power Wireless Sensornets
The system and network architecture for static sensornets is largely solved today with many stable commercial solutions now available and standardization efforts underway at the I...
Prabal Dutta, David E. Culler
DAC
2008
ACM
14 years 9 months ago
Feedback-controlled reliability-aware power management for real-time embedded systems
In recent literature it has been reported that Dynamic Power Management (DPM) may lead to decreased reliability in real-time embedded systems. The ever-shrinking device sizes cont...
Ranjani Sridharan, Nikhil Gupta, Rabi N. Mahapatra