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» A Design Environment for Counterflow Pipeline Synthesis
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LCTRTS
1998
Springer
13 years 11 months ago
A Design Environment for Counterflow Pipeline Synthesis
The Counterflow Pipeline (CFP) organization may be a good target for synthesis of application-specific microprocessors for embedded systems because it has a regular and simple str...
Bruce R. Childers, Jack W. Davidson
TVLSI
2008
120views more  TVLSI 2008»
13 years 6 months ago
An Interactive Design Environment for C-Based High-Level Synthesis of RTL Processors
Much effort in register transfer level (RTL) design has been devoted to developing "push-button" types of tools. However, given the highly complex nature, and lack of con...
Dongwan Shin, Andreas Gerstlauer, Rainer Döme...
IPPS
2002
IEEE
13 years 11 months ago
Efficient Pipelining of Nested Loops: Unroll-and-Squash
The size and complexity of current custom VLSI have forced the use of high-level programming languages to describe hardware, and compiler and synthesis technology bstract designs ...
Darin Petkov, Randolph E. Harr, Saman P. Amarasing...
CCE
2004
13 years 6 months ago
Pharmaceutical supply chains: key issues and strategies for optimisation
Supply chain optimisation is now a major research theme in process operations and management. A great deal of research has been undertaken on facility location and design, invento...
Nilay Shah