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109
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ATS
2001
IEEE
74views Hardware» more  ATS 2001»
15 years 7 months ago
An Improved AVPG Algorithm for SoC Design Verification Using Port Order Fault Model
Chun-Yao Wang, Shing-Wu Tung, Jing-Yang Jou
EURODAC
1994
IEEE
148views VHDL» more  EURODAC 1994»
15 years 7 months ago
System-Level Modeling and Verification: a Comprehensive Design Methodology
Paolo Camurati, Fulvio Corno, Paolo Prinetto, Cath...
100
Voted
VLDB
1987
ACM
85views Database» more  VLDB 1987»
15 years 7 months ago
Using Design Axioms and Topology to Model Database Semantics
Arno Siebes, Martin L. Kersten