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IPPS
2005
IEEE
14 years 2 months ago
Runtime Empirical Selection of Loop Schedulers on Hyperthreaded SMPs
Hyperthreaded (HT) and simultaneous multithreaded (SMT) processors are now available in commodity workstations and servers. This technology is designed to increase throughput by e...
Yun Zhang, Michael Voss
ISCA
2005
IEEE
119views Hardware» more  ISCA 2005»
14 years 2 months ago
Rescue: A Microarchitecture for Testability and Defect Tolerance
Scaling feature size improves processor performance but increases each device’s susceptibility to defects (i.e., hard errors). As a result, fabrication technology must improve s...
Ethan Schuchman, T. N. Vijaykumar
ISPAN
2005
IEEE
14 years 2 months ago
A Self-stabilizing Link-Cluster Algorithm in Mobile Ad Hoc Networks
We design a self-stabilizing cluster routing algorithm based on the link-cluster architecture of wireless ad hoc networks. The network is divided into clusters. Each cluster has a...
Doina Bein, Ajoy Kumar Datta, Chakradhar R. Jaggan...
IWIA
2005
IEEE
14 years 2 months ago
Malware Defense Using Network Security Authentication
Malware defenses have primarily relied upon intrusion fingerprints to detect suspicious network behavior. While effective for discovering computers that are already compromised,...
Joseph V. Antrosio, Errin W. Fulp
KBSE
2005
IEEE
14 years 2 months ago
Determining the cost-quality trade-off for automated software traceability
Major software development standards mandate the establishment of trace links among software artifacts such as requirements, architectural elements, or source code without explici...
Alexander Egyed, Stefan Biffl, Matthias Heindl, Pa...
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