162 search results - page 12 / 33 » A Distributed Cache Coherence Protocol for Hypercube Multipr... |
MICRO
2006
IEEE
14 years 2 months ago
2006
IEEE
Ring interconnects may be an attractive solution for future chip multiprocessors because they can enable faster links than buses and simpler switches than arbitrary switched inter...
TC
1998
13 years 8 months ago
1998
—We evaluate three extensions to directory-based cache coherence protocols in shared-memory multiprocessors. These extensions are aimed at reducing the penalties associated with ...
PACT
2007
Springer
14 years 2 months ago
2007
Springer
Abstract. It has been already verified that hardware-supported finegrain synchronization provides a significant performance improvement over coarse-grained synchronization mecha...
HIPEAC
2010
Springer
13 years 10 months ago
2010
Springer
Abstract. Customizable processors augmented with application-specific Instruction Set Extensions (ISEs) have begun to gain traction in recent years. The most effective ISEs include...
IPPS
1998
IEEE
14 years 20 days ago
1998
IEEE
Abstract. We address the problem of developing efficient cache coherence protocols implementing distributed shared memory (DSM) using message passing. A serious drawback of traditi...