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» A Distributed Control Path Architecture for VLIW Processors
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ISPA
2007
Springer
14 years 1 months ago
Parallelization Strategies for the Points of Interests Algorithm on the Cell Processor
The Cell processor is a typical example of a heterogeneous multiprocessor-on-chip architecture that uses several levels of parallelism to deliver high performance. Closing the gap ...
Tarik Saidani, Lionel Lacassagne, Samir Bouaziz, T...
HICSS
1994
IEEE
118views Biometrics» more  HICSS 1994»
13 years 11 months ago
A Distributed Architecture for an Instructable Problem Solver
Our research goal is to design systems that enable humans to teach tedious, repetitive, simple tasks to a computer. We propose here a learner/problem solver architecture for such ...
Jacky Baltes, Bruce A. MacDonald
MICRO
1998
IEEE
98views Hardware» more  MICRO 1998»
13 years 12 months ago
Task Selection for a Multiscalar Processor
The Multiscalar architecture advocates a distributed processor organization and task-level speculation to exploit high degrees of instruction level parallelism (ILP) in sequential...
T. N. Vijaykumar, Gurindar S. Sohi
CODES
2009
IEEE
13 years 11 months ago
TotalProf: a fast and accurate retargetable source code profiler
Profilers play an important role in software/hardware design, optimization, and verification. Various approaches have been proposed to implement profilers. The most widespread app...
Lei Gao, Jia Huang, Jianjiang Ceng, Rainer Leupers...
TII
2010
146views Education» more  TII 2010»
13 years 2 months ago
PAUC: Power-Aware Utilization Control in Distributed Real-Time Systems
Abstract--CPU utilization control has recently been demonstrated to be an effective way of meeting end-to-end deadlines for distributed real-time systems running in unpredictable e...
Xiaorui Wang, Xing Fu, Xue Liu, Zonghua Gu