3868 search results - page 690 / 774 » A Distributed Parallel Programming Framework |
FCCM
2008
IEEE
14 years 4 months ago
2008
IEEE
High-Level Languages (HLLs) for FPGAs (FieldProgrammable Gate Arrays) facilitate the use of reconfigurable computing resources for application developers by using familiar, higher...
MATES
2005
Springer
14 years 3 months ago
2005
Springer
One aspect of rational behavior is that agents can pursue multiple goals in parallel. Current BDI theory and systems do not provide a theoretical or architectural framework for dec...
AIPR
2008
IEEE
14 years 1 days ago
2008
IEEE
In this paper, we introduce real time image processing techniques using modern programmable Graphic Processing Units (GPU). GPUs are SIMD (Single Instruction, Multiple Data) device...
TCAD
2010
13 years 4 months ago
2010
The growing complexity of systems and their implementation into silicon encourages designers to look for model designs at higher levels of abstraction and then incrementally build ...
CC
2003
Springer
14 years 3 months ago
2003
Springer
Abstract. The register allocation in loops is generally performed after or during the software pipelining process. This is because doing a conventional register allocation at firs...