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HPCA
2002
IEEE
16 years 4 months ago
Quantifying Load Stream Behavior
The increasing performance gap between processors and memory will force future architectures to devote significant resources towards removing and hiding memory latency. The two ma...
Suleyman Sair, Timothy Sherwood, Brad Calder
PC
2007
161views Management» more  PC 2007»
15 years 4 months ago
High performance combinatorial algorithm design on the Cell Broadband Engine processor
The Sony–Toshiba–IBM Cell Broadband Engine (Cell/B.E.) is a heterogeneous multicore architecture that consists of a traditional microprocessor (PPE) with eight SIMD co-process...
David A. Bader, Virat Agarwal, Kamesh Madduri, Seu...
EDBT
2011
ACM
256views Database» more  EDBT 2011»
14 years 8 months ago
RanKloud: a scalable ranked query processing framework on hadoop
The popularity of batch-oriented cluster architectures like Hadoop is on the rise. These batch-based systems successfully achieve high degrees of scalability by carefully allocati...
K. Selçuk Candan, Parth Nagarkar, Mithila N...
CCGRID
2003
IEEE
15 years 9 months ago
Noncontiguous I/O Accesses Through MPI-IO
I/O performance remains a weakness of parallel computing systems today. While this weakness is partly attributed to rapid advances in other system components, I/O interfaces avail...
Avery Ching, Alok N. Choudhary, Kenin Coloma, Wei-...
HPCA
2008
IEEE
16 years 4 months ago
Address-branch correlation: A novel locality for long-latency hard-to-predict branches
Hard-to-predict branches depending on longlatency cache-misses have been recognized as a major performance obstacle for modern microprocessors. With the widening speed gap between...
Hongliang Gao, Yi Ma, Martin Dimitrov, Huiyang Zho...