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» A Dynamic Multithreading Processor
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CF
2011
ACM
12 years 10 months ago
Hybrid high-performance low-power and ultra-low energy reliable caches
Ubiquitous computing has become a very popular paradigm. The most suitable technological solution for those systems consists of using hybrid processors able to operate at high vol...
Bojan Maric, Jaume Abella, Francisco J. Cazorla, M...
ARCS
2012
Springer
12 years 5 months ago
Fast Scenario-Based Design Space Exploration using Feature Selection
: This paper presents a novel approach to efficiently perform early system level design space exploration (DSE) of MultiProcessor System-on-Chip (MPSoC) based embedded systems. By...
Peter van Stralen, Andy D. Pimentel
ASPLOS
2009
ACM
14 years 10 months ago
RapidMRC: approximating L2 miss rate curves on commodity systems for online optimizations
Miss rate curves (MRCs) are useful in a number of contexts. In our research, online L2 cache MRCs enable us to dynamically identify optimal cache sizes when cache-partitioning a s...
David K. Tam, Reza Azimi, Livio Soares, Michael St...
OSDI
2002
ACM
14 years 10 months ago
Vertigo: Automatic Performance-Setting for Linux
Combining high performance with low power consumption is becoming one of the primary objectives of processor designs. Instead of relying just on sleep mode for conserving power, a...
Krisztián Flautner, Trevor N. Mudge
ICALP
2009
Springer
14 years 4 months ago
Improved Bounds for Speed Scaling in Devices Obeying the Cube-Root Rule
Speed scaling is a power management technique that involves dynamically changing the speed of a processor. This gives rise to dualobjective scheduling problems, where the operating...
Nikhil Bansal, Ho-Leung Chan, Kirk Pruhs, Dmitriy ...