Sciweavers

1834 search results - page 312 / 367
» A Dynamic Multithreading Processor
Sort
View
ICWS
2009
IEEE
14 years 6 months ago
Adaptive Prefetching Scheme Using Web Log Mining in Cluster-Based Web Systems
The main memory management has been a critical issue to provide high performance in web cluster systems. To overcome the speed gap between processors and disks, many prefetch sche...
Heung Ki Lee, Baik Song An, Eun Jung Kim
IISWC
2008
IEEE
14 years 3 months ago
Characterizing and improving the performance of Intel Threading Building Blocks
Abstract— The Intel Threading Building Blocks (TBB) runtime library [1] is a popular C++ parallelization environment [2][3] that offers a set of methods and templates for creatin...
Gilberto Contreras, Margaret Martonosi
ISVLSI
2008
IEEE
143views VLSI» more  ISVLSI 2008»
14 years 3 months ago
BTB Access Filtering: A Low Energy and High Performance Design
Powerful branch predictors along with a large branch target buffer (BTB) are employed in superscalar processors for instruction-level parallelism exploitation. However, the large ...
Shuai Wang, Jie Hu, Sotirios G. Ziavras
NDSS
2008
IEEE
14 years 3 months ago
Automated Whitebox Fuzz Testing
Fuzz testing is an effective technique for finding security vulnerabilities in software. Traditionally, fuzz testing tools apply random mutations to well-formed inputs of a progr...
Patrice Godefroid, Michael Y. Levin, David A. Moln...
IPCCC
2006
IEEE
14 years 2 months ago
OS-aware tuning: improving instruction cache energy efficiency on system workloads
Low power has been considered as an important issue in instruction cache (I-cache) designs. Several studies have shown that the I-cache can be tuned to reduce power. These techniq...
Tao Li, Lizy K. John