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» A Dynamic Multithreading Processor
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HIPC
2000
Springer
14 years 15 days ago
Instruction Level Distributed Processing
Within two or three technology generations, processor architects will face a number of major challenges. Wire delays will become critical, and power considerations will temper the ...
James E. Smith
ISLPED
2010
ACM
169views Hardware» more  ISLPED 2010»
13 years 9 months ago
TurboTag: lookup filtering to reduce coherence directory power
On-chip coherence directories of today's multi-core systems are not energy efficient. Coherence directories dissipate a significant fraction of their power on unnecessary loo...
Pejman Lotfi-Kamran, Michael Ferdman, Daniel Crisa...
EUROPAR
2007
Springer
14 years 3 months ago
Toward Scalable Matrix Multiply on Multithreaded Architectures
We show empirically that some of the issues that affected the design of linear algebra libraries for distributed memory architectures will also likely affect such libraries for s...
Bryan Marker, Field G. Van Zee, Kazushige Goto, Gr...
DATE
2003
IEEE
86views Hardware» more  DATE 2003»
14 years 2 months ago
Layered, Multi-Threaded, High-Level Performance Design
A primary goal of high-level modeling is to efficiently explore a broad design space, converging on an optimal or near-optimal system architecture before moving to a more detaile...
Andrew S. Cassidy, JoAnn M. Paul, Donald E. Thomas
ASPLOS
2009
ACM
14 years 9 months ago
DMP: deterministic shared memory multiprocessing
Current shared memory multicore and multiprocessor systems are nondeterministic. Each time these systems execute a multithreaded application, even if supplied with the same input,...
Joseph Devietti, Brandon Lucia, Luis Ceze, Mark Os...