In this paper, we present an efficient procedure for building a piecewise linear function approximation of the speed function of a processor with hierarchical memory structure. Th...
In this paper, we present a replanning algorithm for a decision-theoretic hierarchical planner, illustrate the experimental methodology we designed to investigate its performance,...
We propose, and justify, an economic theory to guide memory system design, operation, and analysis. Our theory treats memory random-access latency, and its cost per installed mega...
- Processor scheduling in distributed-memory systems has received considerable attention in recent years. Several commercial distributed-memory systems use spacesharing processor s...
Abstract— Adding SDMA capabilities to modern wireless communication systems like IEEE 802.16 WiMAX promises high system capacity gains but raises the problem of combining orthogo...
Christian Hoymann, Jan Ellenbeck, Ralf Pabst, Marc...