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CASES
2007
ACM
13 years 11 months ago
Performance evaluation and optimization of dual-port SDRAM architecture for mobile embedded systems
Recently dual-port SDRAM (DPSDRAM) architecture tailored for dual-processor based mobile embedded systems has been announced where a single memory chip plays the role of the local...
Hoeseok Yang, Sungchan Kim, Hae-woo Park, Jinwoo K...
NETWORKING
2008
13 years 9 months ago
Cache Placement Optimization in Hierarchical Networks: Analysis and Performance Evaluation
Caching popular content in the Internet has been recognized as one of the effective solution to alleviate network congestion and accelerate user information access. Sharing and coo...
Wenzhong Li, Edward Chan, Yilin Wang, Daoxu Chen, ...
PLDI
2006
ACM
14 years 1 months ago
Free-Me: a static analysis for automatic individual object reclamation
Garbage collection has proven benefits, including fewer memoryrelated errors and reduced programmer effort. Garbage collection, however, trades space for time. It reclaims memory...
Samuel Z. Guyer, Kathryn S. McKinley, Daniel Framp...
MAM
2002
151views more  MAM 2002»
13 years 7 months ago
A performance evaluation of cache injection in bus-based shared memory multiprocessors
Bus-based shared memory multiprocessors with private caches and snooping write-invalidate cache coherence protocols are dominant form of small- to medium-scale parallel machines t...
Aleksandar Milenkovic, Veljko M. Milutinovic
ICS
1999
Tsinghua U.
13 years 12 months ago
Nonlinear array layouts for hierarchical memory systems
Programming languages that provide multidimensional arrays and a flat linear model of memory must implement a mapping between these two domains to order array elements in memory....
Siddhartha Chatterjee, Vibhor V. Jain, Alvin R. Le...