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» A Fast FPGA Implementation of a General Purpose Neuron
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3DPVT
2006
IEEE
229views Visualization» more  3DPVT 2006»
13 years 11 months ago
Fast and Efficient Dense Variational Stereo on GPU
Thanks to their high performance and programmability, the latest graphics cards can now be used for scientific purpose. They are indeed very efficient parallel Single Instruction ...
Julien Mairal, Renaud Keriven, Alexandre Chariot
FGCN
2007
IEEE
109views Communications» more  FGCN 2007»
14 years 1 months ago
Flow Balancing Hardware for Parallel TCP Streams on Long Fat Pipe Network
Parallel TCP streams are used for data transfer between clusters in today's high performance applications. When parallel TCP streams are used on LFN, part of streams fail to ...
Yutaka Sugawara, Mary Inaba, Kei Hiraki
ICS
2009
Tsinghua U.
14 years 2 months ago
Fast and scalable list ranking on the GPU
General purpose programming on the graphics processing units (GPGPU) has received a lot of attention in the parallel computing community as it promises to offer the highest perfo...
M. Suhail Rehman, Kishore Kothapalli, P. J. Naraya...
JCP
2008
126views more  JCP 2008»
13 years 7 months ago
Hardware/Software Co-design Approach for an ADALINE Based Adaptive Control System
Abstract--In this paper, we report some results on hardware and software co-design of an adaptive linear neuron (ADALINE) based control system. A discrete-time Proportional-Integra...
Shouling He, Xuping Xu
CF
2007
ACM
13 years 11 months ago
Massively parallel processing on a chip
MppSoC is a SIMD architecture composed of a grid of processors and memories connected by a X-Net neighbourhood network and a general purpose global router. MppSoC is an evolution ...
Philippe Marquet, Simon Duquennoy, Sébastie...