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» A Fast Two-level Logic Minimizer
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129
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CORR
2008
Springer
118views Education» more  CORR 2008»
15 years 3 months ago
A Logic Programming Framework for Combinational Circuit Synthesis
Abstract. Logic Programming languages and combinational circuit synthesis tools share a common "combinatorial search over logic formulae" background. This paper attempts ...
Paul Tarau, Brenda Luderman
IFSA
2007
Springer
138views Fuzzy Logic» more  IFSA 2007»
15 years 9 months ago
Optimization to Manage Supply Chain Disruptions Using the NSGA-II
Disruption on a supply chain provokes lost that should be minimized looking for alternative suppliers. This solution involves a strategy to manage the impact of the disruption and ...
Víctor Serrano, Matías Alvarado, Car...
141
Voted
DAC
2010
ACM
14 years 10 months ago
Node addition and removal in the presence of don't cares
This paper presents a logic restructuring technique named node addition and removal (NAR). It works by adding a node into a circuit to replace an existing node and then removing t...
Yung-Chih Chen, Chun-Yao Wang
VTC
2008
IEEE
129views Communications» more  VTC 2008»
15 years 9 months ago
On Parallelizing the CryptMT Stream Cipher
Abstract—Fast stream ciphers are used extensively for encrypted data transmission in mobile networks and over multigigabit links. CryptMT, a recently proposed stream cipher, is o...
Deian Stefan, David B. Nummey, Jared Harwayne-Gida...
130
Voted
MICRO
1998
IEEE
91views Hardware» more  MICRO 1998»
15 years 7 months ago
Effective Cluster Assignment for Modulo Scheduling
Clustering is one solution to the demand for wideissue machines and fast clock cycles because it allows for smaller, less ported register files and simpler bypass logic while rema...
Erik Nystrom, Alexandre E. Eichenberger