107 search results - page 5 / 22 » A Fine-Grain Parallel Architecture Based on Barrier Synchron... |
SPAA
1992
ACM
13 years 10 months ago
1992
ACM
A global barrier synchronizes all processors in a parallel system. This paper investigates algorithms that allow disjoint subsets of processors to synchronize independently and in...
FPGA
2006
ACM
13 years 10 months ago
2006
ACM
In this paper, we present reconfigurable hardware architecture for detecting semantics of streaming data on 1+ Gbps networks. The design leverages on the characteristics of contex...
ICPPW
2005
IEEE
14 years 9 days ago
2005
IEEE
Large–scale parallel applications performing global synchronization may spend a significant amount of execution time waiting for the completion of a barrier operation. Conseque...
IPPS
2009
IEEE
14 years 1 months ago
2009
IEEE
In this paper we use Dijkstra’s algorithm as a challenging, hard to parallelize paradigm to test the efficacy of several parallelization techniques in a multicore architecture....
IAT
2003
IEEE
13 years 12 months ago
2003
IEEE
This paper presents MPIAB, an agent based architecture for parallel processing. The architecture is developed to model the functions of standard MPI using java agents. It remedies...