107 search results - page 9 / 22 » A Fine-Grain Parallel Architecture Based on Barrier Synchron... |
ISCAS
2011
IEEE
12 years 10 months ago
2011
IEEE
Abstract— Multi-core processors are about to conquer embedded systems — it is not the question of whether they are coming but how the architectures of the microcontrollers shou...
IPPS
1999
IEEE
13 years 11 months ago
1999
IEEE
The Paderborn University BSP (PUB) library is a parallel C library based on the BSP model. The basic library supports buffered and unbuffered asynchronous communication between an...
EMSOFT
2004
Springer
14 years 3 days ago
2004
Springer
Dataflow synchronous languages have attracted considerable interest in domains such as real-time control and hardware design. The potential benefits are promising: Discrete-time...
DATE
2009
IEEE
14 years 1 months ago
2009
IEEE
Nowadays, in MPSoCs and NoCs, multicast protocol is significantly used for many parallel applications such as cache coherency in distributed shared-memory architectures, clock sync...
CF
2010
ACM
13 years 11 months ago
2010
ACM
Per-core local (scratchpad) memories allow direct inter-core communication, with latency and energy advantages over coherent cache-based communication, especially as CMP architect...