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DAC
2006
ACM
14 years 9 months ago
Early cutpoint insertion for high-level software vs. RTL formal combinational equivalence verification
Ever-growing complexity is forcing design to move above RTL. For example, golden functional models are being written as clearly as possible in software and not optimized or intend...
Xiushan Feng, Alan J. Hu
ISARCS
2010
156views Hardware» more  ISARCS 2010»
13 years 10 months ago
A Road to a Formally Verified General-Purpose Operating System
Methods of formal description and verification represent a viable way for achieving fundamentally bug-free software. However, in reality only a small subset of the existing operati...
Martin Decký
ACMSE
2008
ACM
13 years 10 months ago
A self-testing autonomic job scheduler
Although researchers have been exchanging ideas on the design and development of autonomic systems, there has been little emphasis on validation. In an effort to stimulate interes...
Alain E. Ramirez, Barbara Quinones-Morales, Tariq ...
SIGSOFT
2005
ACM
14 years 9 months ago
Relational analysis of algebraic datatypes
We present a technique that enables the use of finite model finding to check the satisfiability of certain formulas whose intended models are infinite. Such formulas arise when us...
Viktor Kuncak, Daniel Jackson
ATVA
2007
Springer
134views Hardware» more  ATVA 2007»
14 years 12 days ago
Formal Modeling and Verification of High-Availability Protocol for Network Security Appliances
One of the prerequisites for information society is secure and reliable communication among computing systems. Accordingly, network security appliances become key components of inf...
Moonzoo Kim