24 search results - page 3 / 5 » A Fully Asynchronous Superscalar Architecture |
DAC
1996
ACM
13 years 11 months ago
1996
ACM
-- This paper presents an efficient method for the timing verification of concurrent systems, modeled as labeled Timed Petri nets. The verification problems we consider require us ...
SBACPAD
2004
IEEE
13 years 9 months ago
2004
IEEE
High-performance superscalar processors are designed with the help of complex simulation environment. The simulation infrastructure permits to validate the processor instruction s...
IPPS
1998
IEEE
13 years 11 months ago
1998
IEEE
With aggressive superscalar processors delivering diminishing returns, alternate designs that make good use of the increasing chip densities are actively being explored. One such ...
IPPS
2010
IEEE
13 years 5 months ago
2010
IEEE
To exploit the potential of multicore architectures, recent dense linear algebra libraries have used tile algorithms, which consist in scheduling a Directed Acyclic Graph (DAG) of...
ICNS
2007
IEEE
14 years 1 months ago
2007
IEEE
Abstract—This paper presents a novel architecture for Gridenabled optical burst switched networks. We suggest an overall Grid network architecture and we propose a Grid Optical U...