43 search results - page 3 / 9 » A Fully Pipelined XQuery Processor |
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
The performance of SIMD processors is often limited by the time it takes to transfer data between the centralized control unit and the parallel processor array. This is especially...
IPPS
2010
IEEE
13 years 5 months ago
2010
IEEE
In this paper, we study the problem of finding optimal mappings for several independent but concurrent workflow applications, in order to optimize performance-related criteria tog...
DAC
2009
ACM
14 years 8 months ago
2009
ACM
Functional validation of a processor design through execution of a suite of test programs is common industrial practice. In this paper, we develop a high-level architectural speci...
DSD
2002
IEEE
14 years 17 days ago
2002
IEEE
We use a formal tool to extract Finite State Machines (FSM) based representations (lists of states and transitions) of sequential circuits described by flip-flops and gates. The...
ICIP
2005
IEEE
14 years 9 months ago
2005
IEEE
This paper describes the architecture of an 8x8 2-D DCT/IDCT processor with high throughput, reduced hardware, and a parallel-pipeline scheme. This architecture allows the process...