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ASPDAC
2012
ACM
253views Hardware» more  ASPDAC 2012»
12 years 4 months ago
An integrated and automated memory optimization flow for FPGA behavioral synthesis
Behavioral synthesis tools have made significant progress in compiling high-level programs into register-transfer level (RTL) specifications. But manually rewriting code is still ...
Yuxin Wang, Peng Zhang, Xu Cheng, Jason Cong
IH
2001
Springer
14 years 1 months ago
Computational Forensic Techniques for Intellectual Property Protection
Computational forensic engineering (CFE) aims to identify the entity that created a particular intellectual property (IP). Rather than relying on watermarking content or designs, t...
Jennifer L. Wong, Darko Kirovski, Miodrag Potkonja...
AADEBUG
2005
Springer
14 years 2 months ago
Code coverage testing using hardware performance monitoring support
Code coverage analysis, the process of finding code exercised by a particular set of test inputs, is an important component of software development and verification. Most tradit...
Alex Shye, Matthew Iyer, Vijay Janapa Reddi, Danie...
VLDB
1990
ACM
143views Database» more  VLDB 1990»
14 years 26 days ago
Synthesizing Database Transactions
Database programming requires having the knowledge of database semantics both to maintain database integrity and to explore more optimization opportunities. Automated programming ...
Xiaolei Qian
JMLR
2006
112views more  JMLR 2006»
13 years 8 months ago
Kernels on Prolog Proof Trees: Statistical Learning in the ILP Setting
We develop kernels for measuring the similarity between relational instances using background knowledge expressed in first-order logic. The method allows us to bridge the gap betw...
Andrea Passerini, Paolo Frasconi, Luc De Raedt