136 search results - page 11 / 28 » A Graph Reduction Approach to Symbolic Circuit Analysis |
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
Process variations in modern VLSI technologies are growing in both magnitude and dimensionality. To assess performance variability, complex simulation and performance models param...
FMCAD
2000
Springer
13 years 11 months ago
2000
Springer
Abstract. This paper presents a scalable method for parallel symbolic on-the-fly model checking in a distributed memory environment. Our method combines a scheme for on-the-fly mod...
CLEIEJ
2010
13 years 5 months ago
2010
A 3D circuit is the stacking of regular 2D circuits. The advances on the fabrication and packaging technologies allowed interconnecting stacked 2D circuits by using 3D vias. Howeve...
ICCD
2004
IEEE
14 years 4 months ago
2004
IEEE
This paper presents a novel approach to reducing the complexity of the transient linear circuit analysis for a hybrid structured clock network. Topology reduction is first used to...
ASPDAC
2001
ACM
13 years 11 months ago
2001
ACM
Abstract-- Image computation is the core operation for optimization and formal verification of sequential systems like controllers or protocols. State exploration techniques based ...