136 search results - page 7 / 28 » A Graph Reduction Approach to Symbolic Circuit Analysis |
JCO
2010
13 years 6 months ago
2010
Abstract Polynomial-time data reduction is a classical approach to hard graph problems. Typically, particular small subgraphs are replaced by smaller gadgets. We generalize this ap...
ASPDAC
2005
ACM
13 years 9 months ago
2005
ACM
- We address the problem of implication of assertion graphs that occur in generalized symbolic trajectory evaluation (GSTE). GSTE has demonstrated its powerful capacity in formal v...
ICDAR
2009
IEEE
13 years 5 months ago
2009
IEEE
In this paper, we tackle the problem of localizing graphical symbols on complex technical document images by using an original approach to solve the subgraph isomorphism problem. ...
ASPDAC
2000
ACM
13 years 12 months ago
2000
ACM
Abstract— Clock-gating techniques are very effective in the reduction of the switching activity in sequential logic circuits. In particular, recent work has shown that significa...
DAC
2005
ACM
14 years 8 months ago
2005
ACM
eriodically time-varying (LPTV) abstractions are useful for a variety of communication and computer subsystems. In this paper, we present a novel operator-based model-order reduct...